1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device in which a processing circuit is integrated on a semiconductor chip to perform specific processing on a received signal and output the processed signal, and more particularly to a technique of reducing the power consumption of such a semiconductor integrated circuit device.
2. Description of the Related Art
An exemplary conventional circuit for reducing the leakage current of a logic circuit includes an n-channel transistor and an inverter circuit. The n-channel transistor operates as a switch for cutting off power supply to the logic circuit, and the inverter circuit is used to drive the n-channel transistor. (See, for example, “90 nm Low Leakage SoC Design Technique for Wireless Applications”, 2005 IEEE International Solid-State Circuits Conference (ISSCC), 2005, p. 138-139, FIGS. 7, 6, 3.)